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makefile for multiple source files problem

Posted by vl 
Hello,
I have my basic module 'hello.c':
#include <linux/module.h>
#include <linux/kernel.h>

#include "test.h"

int init_module(void)
{
printk("<1>Hello world 1. init_module\n"winking smiley;

// function called from test.c

test();

return 0;
}


void cleanup_module(void)
{
printk("Goodbye world 1.\n"winking smiley;
}

The function "test" declared in test.h
void test(void);
and defined in "test.c":
#include <linux/module.h>
#include "test.h"

void test()
{
printk("test performed!\n"winking smiley;
}

Here's the makefile:
obj-m += hello.o
obj-m += testo.o
testo-objs := test.o

all:
make -C /lib/modules/$(shell uname -r)/build M=$(shell pwd) modules

clean:
make -C /lib/modules/$(shell uname -r)/build M=$(shell pwd) clean

The make creates testo.ko but doesn't link test.o to the hello module.
I've found this approach in multiple tutorials but it doesn't seem to work.
Any idea how to do it correctly?
Thanks,
-V
see [code.google.com]
for a good example of multiple source files and having sub-folders.

per your case, do like the below:
MODNAME := helloworld
obj-m := ${MODNAME}.o 
${MODNAME}-y :=
${MODNAME}-y += test.o hello.o

you'll get helloworld.ko.

btw, could also try
obj-m := ${MODNAME}.o  
${MODNAME}-objs= 
${MODNAME}-objs+= test.o hello.o


-Pat
The Effo Staff
Effo Project, [effo.sourceforge.net]
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